Principal PCIe CXL RTL Design Engineer
- Location
- FR-Aix-en-Provence | BG-SOFIA | US-OR-Hillsboro | IN-KA-Bangalore
- Employment type
- Full-time
- Last seen
- Oct 11, 2026
About the role
Rambus, a premier chip and silicon IP provider, is seeking to hire a motivated full-time Senior Design engineer to join our PCIe, CXL IP design team. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.